PNP bipolar transistors are readily produced in CMOS integrated circuits as parasitic substrate devices. This is quite advantageous as bipolar transistors have an emitter-to-base voltage (Veb) that varies predictably with regard to temperature. The temperature of integrated circuits may thus be readily monitored using a bipolar transistor as a temperature transducer. Because a bipolar transistor may be inexpensively embedded with the circuits it monitors, bipolar transistor temperature transducers are attractive options to a circuit designer.
Although bipolar transistor temperature transducers are inexpensive, they suffer from a number of problems. For example, it is known that if the collector current for a bipolar transistor is changed from a first collector current value IC1 to a second collector current value IC2, a resulting change in emitter-to-base voltage (ΔVeb) is directly proportional to a product of the absolute temperature T and the logarithm of a ratio of the collector currents (IC2/IC1). If IC2 equals N*IC1, then the temperature is proportional to ΔVeb divided by the logarithm of N. This logarithm of N may be stored in memory such that the temperature measurement merely requires mapping ΔVeb by some proportionality factor.
The accuracy of the temperature measurement is thus a function of the accuracy for the collector current ratio generation. Generation of the varying collector currents involves the use of a current source and matched transistors. Ideally, the matched transistors are perfectly identical in order to generate accurate current ratios. Nevertheless, in a real circuit, the matched transistors are not perfectly identical and include slight variations that result in deviations in current outputs. The deviations in the current outputs caused by the slight mismatching among the matched transistors may cause inaccurate current ratios that adversely affect the temperature measurements of the bipolar transistor temperature transducer.
One conventional approach to mitigate the variations in the current outputs of matched transistors is to increase the area of the transistors. For example, the trend for transistor matching is closely approximated by 1/√(the device area). Thus, a device size that leads to 1% matching would need to grow 100 times in size to meet a 0.1% matching requirement. As such, this conventional approach is prohibitively expensive due to the increase in silicon area required in the transistor device.
Other approaches may include methods of random dynamic element matching. In particular, pure random and data-weighted methods are typically used in systems including Analog-to-Digital Converters (ADCs). In order to match currents in both absolute and relative values, all possible combinations of elements that may create the necessary output quantity are required to be involved in the process. As such, a large sample of the combinations must be implemented during the operation of interest, e.g., temperature measurement, so that the true mean of the population of device combinations may be realized. Thus, this approach increases design complexity and lengthens the temperature measurement cycle.
Accordingly, there is a need in the art for an array of matched transistors that generate accurate current ratios.
Embodiments of the present invention and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.